Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclosure via physical access.
References
Link | Resource |
---|---|
https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00349.html | Vendor Advisory |
https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00349.html | Vendor Advisory |
Configurations
Configuration 1 (hide)
AND |
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History
21 Nov 2024, 04:53
Type | Values Removed | Values Added |
---|---|---|
References | () https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00349.html - Vendor Advisory |
Information
Published : 2020-03-12 21:15
Updated : 2024-11-21 04:53
NVD link : CVE-2020-0574
Mitre link : CVE-2020-0574
CVE.ORG link : CVE-2020-0574
JSON object : View
Products Affected
intel
- max_10_fpga
- max_10_fpga_firmware
CWE