CVE-2019-17391

An issue was discovered in the Espressif ESP32 mask ROM code 2016-06-08 0 through 2. Lack of anti-glitch mitigations in the first stage bootloader of the ESP32 chip allows an attacker (with physical access to the device) to read the contents of read-protected eFuses, such as flash encryption and secure boot keys, by injecting a glitch into the power supply of the chip shortly after reset.

CVSS v3 4.6 MEDIUM
CVSS v2.0 2.1 LOW

4.6^/10

CVSS v3 : MEDIUM

Vector :

Exploitability : 0.9 / Impact : 3.6

Attack Vector PHYSICAL

Attack Complexity LOW

Privileges Required NONE

User Interaction NONE

Confidentiality Impact HIGH

Integrity Impact NONE

Availability Impact NONE

Scope UNCHANGED

2.1^/10

CVSS v2.0 : LOW

Vector : AV:L/AC:L/Au:N/C:P/I:N/A:N

Exploitability : 3.9 / Impact : 2.9

Access Vector LOCAL

Access Complexity LOW

Authentication NONE

Confidentiality Impact PARTIAL

Integrity Impact NONE

Availability Impact NONE

References

Link	Resource
https://www.espressif.com/en/news/Security_Advisory_Concerning_Fault_Injection_and_eFuse_Protections	Vendor Advisory

Configurations

Configuration 1 (hide)

AND

cpe:2.3:o:espressif:esp32-d0wd_firmware:-:*:*:*:*:*:*:*

cpe:2.3:h:espressif:esp32-d0wd:-:*:*:*:*:*:*:*

Configuration 2 (hide)

AND

cpe:2.3:o:espressif:esp32-d2wd_firmware:-:*:*:*:*:*:*:*

cpe:2.3:h:espressif:esp32-d2wd:-:*:*:*:*:*:*:*

Configuration 3 (hide)

AND

cpe:2.3:o:espressif:esp32-s0wd_firmware:-:*:*:*:*:*:*:*

cpe:2.3:h:espressif:esp32-s0wd:-:*:*:*:*:*:*:*

Configuration 4 (hide)

AND

cpe:2.3:o:espressif:esp32-pico-d4_firmware:-:*:*:*:*:*:*:*

cpe:2.3:h:espressif:esp32-pico-d4:-:*:*:*:*:*:*:*

History

No history.

Information

Published : 2019-11-14 21:15

Updated : 2024-02-28 17:28

NVD link : CVE-2019-17391

Mitre link : CVE-2019-17391

CVE.ORG link : CVE-2019-17391

JSON object : View

Products Affected

espressif

esp32-pico-d4
esp32-d0wd_firmware
esp32-s0wd_firmware
esp32-d2wd
esp32-d0wd
esp32-s0wd
esp32-d2wd_firmware
esp32-pico-d4_firmware

CWE

CWE-755

Improper Handling of Exceptional Conditions

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